ABCs of bias generators

Members: Christoph Maier, federico corradi, Jongkil Park, Magdalena Kogutowska, Sudarshan Ramenahalli, Tobi Delbruck, Theodore Yu

Leaders: Tobi Delbruck

Learn how to make on-chip bias current references using Widlar bootstrapped mirrors and Bult and Geelen current splitters. These circuits will make your chips work better and make your users happier. See  http://jaer.wiki.sourceforge.net/biasgen for more details.

Tutorial Material


The image below shows the bootstrapped mirror feeding a current splitter. This basic architecture is used for all the bias generators we have built.

The illustration below shows the architecture of the programmable bias generators used on [ our DVS128 dynamic vision sensor silicon retina]. The same current splitter is used together with shift register latches and t-gates to steer and buffer a fraction of the master current for each bias.


The plan is for 4 blackboard tutorial sessions

  1. Introduction and motivation for on-chip bias generation - demonstrations of existing systems. Widlar's bootstrapped mirror.
  2. Widlar's bootstrapped mirror continuation - startup and performance.
  3. Bult & Geelen's current splitter and its characterization.
  4. Programmable bias generator and it's future development.


Some papers we have published on bias generators are below

The original current slitting principle is described in the paper below, along with another paper on current splitter accuracy

See the attachments for other interesting papers from the group of Bernabe Linares-Barranco and 'teresa serrano-gottaredeno', who invented the sub-off-current (or as they call it, sub-pA) mirror and who have developed interesting ways of using current splitter statistical variation to improve accuracy.