2010/bias10

ABCs of bias generators

Members: Garrick Orchard, Tobi Delbruck

Leaders: Tobi Delbruck

Learn how to make on-chip bias current references using Widlar bootstrapped mirrors and Bult and Geelen current splitters. These circuits will make your chips work better and make your users happier. See  http://jaer.wiki.sourceforge.net/biasgen for more details.

Background

See source:bias10 for presentations and papers about bias generators.

The image below shows the bootstrapped mirror feeding a current splitter. This basic architecture is used for all the bias generators we have built.

http://www.ini.unizh.ch/~tobi/biasgen/designKitFixedBiases/biasgen.gif

The illustration below shows the architecture of the programmable bias generators used on [ our DVS128 dynamic vision sensor silicon retina]. The same current splitter is used together with shift register latches and t-gates to steer and buffer a fraction of the master current for each bias.

http://www.ini.unizh.ch/~tobi/biasgen/designKitProgrammableBiases/biasgenCircuit.png

Subversion repository URL

The URL is https://neuromorphs.net/svn/ws2010/bias - use this to get lecture material.

Schedule

The plan is for 4 blackboard tutorial sessions

  1. Introduction and motivation for on-chip bias generation - demonstrations of existing systems. Widlar's bootstrapped mirror.
  2. Widlar's bootstrapped mirror continuation - startup and performance.
  3. Bult & Geelen's current splitter and its characterization.
  4. Programmable bias generator and it's future development.

Projects

Participate in the paper / schematic design of the next generation bias current references, which will be much smaller in size and faster to control by using a coarse / fine strategy and addressable biases.

Resources

Attachments